What is Static Timing Analysis

Static timing analysis (will be referred to as STA hence forth) is a technique in Application Specific Integrated Circuit implementation using which, the implemented logic circuit is validated against a set of timing constraints.

STA is carried out at different implementation Phases.
The following are the different implementation Phases:

1. HDL coding.
2. Synthesis.
3. DFT insertion.
4. Placement.
5. Routing.

Static timing analysis is used as a measure of how best the implementation achieves the required timing constraints.